It has been found that III-V semiconductor materials (e.g. GaAs and GaN) and IV semiconductor materials (e.g. Si, Ge, C and combinations thereof) are a desirable semiconductor material in many electronic and photonic applications. As understood in the art, the active semiconductor material must be provided as a crystalline or single-crystal formation for the most efficient and useful bases for the fabrication of various electronic and photonic devices therein. Further, the single-crystal active semiconductor material is most conveniently formed on single-crystal silicon wafers because of the extensive background and technology developed in the silicon semiconductor industry. However, the crystal lattice constant mismatch between silicon and many active semiconductor materials, such as GaN, GaAs, SiGe, SiC is relatively large if grown c-axis on (111) oriented silicon. Also, the silicon substrate has a cubic crystal structure while the active semiconductor materials may have a cubic or hexagonal crystal structure. Growing cubic semiconductor layers on hexagonal oxides or vice versa results in high defect density in the semiconductor layers because of a different atom stacking sequence in the layers.
A buffer layer between the silicon substrate and the active semiconductor layer that compensates for the crystal lattice constant mismatch is preferably included. Several copending patent applications have been filed in the U.S. in which rare earth oxides were grown on a silicon substrate to serve as a stress engineered buffer layer for the subsequent growth of III-N semiconductor material. Two of these copending U.S. patent applications are: “Strain Compensated REO Buffer for III-N on Silicon”, filed 21 Oct. 2011, bearing Ser. No. 13/278,952; and “Nucleation of III-N on REO Templates”, filed 20 Mar. 2012, bearing Ser. No. 61/613,289, both of which are included herein by reference. In a copending application entitled “Single Crystal Ge on Si”, filed 20 Mar. 2012, with Ser. No. 13/425,079, and included herein by reference, a rare earth oxide with a normally hexagonal crystal structure is grown in a cubic form on a rare earth oxide with a cubic crystal structure by keeping the thickness below a crystal thickness. In U.S. Pat. No. 7,785,706, entitled “Semiconductor Wafer and Process for its Production”, issued Aug. 31, 2010, semiconductors with hexagonal structure are grown on oxides with cubic la3 crystal structure.
One of the problems with prior art attempts to provide a crystal lattice match between a silicon substrate and an active semiconductor layer is that many layers of different material may be required to gradually shift the crystal lattice spacing from the silicon substrate to the active semiconductor material so that all of the various layers remain single crystal material. Also, different REO materials have different crystalline structures (i.e. cubic, hexagonal, monoclinic) so that matching different active semiconductor layers to silicon substrates requires different REO materials.
It would be highly advantageous, therefore, to remedy the foregoing and other deficiencies inherent in the prior art.
Accordingly, it is an object of the present invention to provide new and improved methods of engineering rare earth oxide (REO) templates for the growth of single-crystal active semiconductor material on silicon substrates.
It is another object of the present invention to provide new and improved methods of forming a REO template on a silicon substrate including as few as a single layer.
It is another object of the present invention to provide new and improved methods of forming a REO template on a silicon substrate that is easy and reliable to control.
It is another object of the present invention to provide a new and improved active semiconductor layer on a silicon substrate including an engineered REO template on the substrate.